1. Field of the Invention
The present invention relates to a semiconductor device, particularly, a semiconductor device having metal wiring connected to a diode having a PN junction.
2. Description of the Related Art
In a conventional semiconductor device, as the diode having the PN junction (hereinafter, referred to as PN junction diode) and metal wiring connected to the PN junction diode, those having the following structures are included.
FIG. 4A shows a section of a schematic structure of the conventional PN junction diode and the metal wiring connected to the PN junction diode.
A P+ region 204 for forming the PN junction is formed in an N+ region 202 formed on a surface of a Si substrate 200. A conductive layer plug 210a is formed on the P+ region 204 and connected to a conductive layer wiring 210b. The conductive layer plug 210a and the conductive layer wiring 210b are formed from a metal such as aluminum, and the conductive layer plug 210a has a structure in which the plug is buried in an insulating film 206 formed to cover a surface of the Si substrate 200.
FIGS. 5A to 5D show a schematic production process of the conventional PN junction diode shown in FIG. 4A.
An N-type impurity is ion-implanted into one main surface of the Si substrate body, thereby the Si substrate 200 as a remaining portion of the body and the N+ region 202 thereon are formed (FIG. 5A). A P-type impurity is ion-implanted into the surface of the N+ region 202, thereby a P+ region 204 is formed (FIG. 5B). In this way, a PN junction 205 is formed in a region where the N+ region 202 is contacted with the P+ region 204.
An insulating film 206 is formed on a surface of the N+ region 202 including the P+ region 204, then an opening 208 for exposing a surface of the P+ region 204 is formed in the insulating film 206 (FIG. 5C). A conductive layer is formed on the insulating film 206 to fill the opening 208 by sputtering, and then a conductive layer plug 210a and a conductive layer wiring 210b are formed by etching patterning (FIG. 5D).
Some diodes having a polysilicon layer provided on a substrate surface are known. For example, in the patent literature 1 (Japanese Patent No. 3,255,698), a diode in which carrier accumulation is prevented by providing the polysilicon layer directly on the PN junction portion and a depletion layer region is proposed. In the patent literature 2 (JP-A-6-350108) a method in which a Zener diode for generating reference voltage and a temperature compensating diode are formed on the same side of a substrate is proposed.
In the conventional PN junction diode shown in FIG. 4A, an area of the junction portion is large and electric current flows in many directions through the junction. FIG. 4B is a perspective view that schematically shows the P+ region 204 in the PN junction diode shown in FIG. 4A. To facilitate the description, the shape is shown as a rectangular prism. Since the PN junction 205 is formed on a bottom 205a and four sides 205b to 205e when the P+ region 204 is assumed to be the rectangular prism, a junction area of the PN junction is large. Moreover, the electric current flows in five directions, that is, a bottom direction I and four side directions II to V as shown by arrows in FIG. 4B. Generally, since the electric current that flows through the circuit increases with increase of the junction area, the large junction area causes increase of leakage current in the PN junction diode.
Thus, the conventional PN junction diode has a drawback of increase of the leakage current because the diode has many current flow paths and a large junction area.
Moreover, in plasma treatment such as sputtering or dry etching process, charge-up current flows along the paths shown by the arrows in FIGS. 4A and 4B as the leakage current. Since surfaces on which the PN junction is formed are the bottom and sides of the P+ region 204, the charge-up current flows in many directions. That is, the charge-up current generated in the plasma treatment such as sputtering in formation of the wiring connected to the PN junction diode flows in many directions, thereby malfunction is apt to occur.